1. Field
Embodiments of the invention relate generally to switching devices and more particularly to transient recovery circuits in switching devices.
2. Prior Art
Many of today's battery powered consumer products require more than one power supply voltage level to operate. For example, a Central Processing Unit (CPU) for a laptop may be designed to operate at 2.9 volts while the hard disk drive operates at 5 volts. Instead of providing several sources of power supply, these products typically use a single power supply source and generate other supply levels with DC to DC converters. The DC to DC conversion is typically performed by the power supply regulator circuitry that is universally provided in battery operated electronic products.
There are basically two types of power supply regulators, linear and switching regulators. Linear regulators rely on a linear control element with feedback to regulate a constant voltage. When a linear regulator is used as a DC to DC converter, there is an appreciable amount of power dissipation.
In a switching regulator, a transistor operating as a switch (switch transistor) periodically applies the input voltage across an inductor for short intervals. Since the input voltage is switched ON and OFF to transfer just enough charge to the load, an ideal switching regulator dissipates zero power. The duty cycle of the switching determines the output voltage level of the switching regulator. There are several types of switching regulators, for example, step-down, step-up, and inverting regulators. Although there are different ways to realize switching conversion, a common method uses inductor and capacitor as energy storage elements and a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) as the switch transistor.
Transient response of a typical switching regulator depends on bandwidth and order of compensation of the system. In a switching regulator, transient response is a function of parameters including output capacitor, inductor, gain of the error amplifier, and compensation network. The output capacitor, inductor, and the operating frequency of the system are chosen based on ripple and efficiency requirements. Once these have been determined, a compensation network is designed based on bandwidth and DC as well as transient line or load regulation requirements.
The aforementioned design approach typically involves a trade-off between accuracy (higher order and gain), speed (higher bandwidth) and surface area required to implement the network on an integrated circuit. Further, in case of low load current to high load current transients and vice versa, a pulse width mode (PWM) switching regulator moves from discontinuous conduction mode (DCM) to continuous conduction mode (CCM). This causes a change in loop dynamics, and consequently the system consumes a large amount of time to settle to the new operating points.
The output voltage of a switching regulator drops if the load current requirement increases and rises if the load current requirement decreases. The ability to respond to a change in load current depends upon the speed of load transient and the bandwidth of the system. If the change in load current is slower than bandwidth of the system, a control loop (feedback loop) can correct the transient and output voltage will be at the expected value. For a fast change in load current, for example, zero to full load in few hundred nanoseconds, the loop response is limited by bandwidth of the feedback loop. Further, because of once per cycle correction of a switching regulator, the response average time is limited to D*T where D is duty cycle and T is time period. The output voltage continues to drop depending on load current and output capacitor till the feedback loop starts correcting. This time is of the order of Tau wherein Tau=1/2*pi*Loop Bandwidth.
Further, response time is degraded significantly if the system needs to transition from DCM to CCM. In typical second order systems, the effective fall in the output voltage can be approximately 20% of output value, before the feedback loop starts to correct. Further, the time to settle to within 2% of the desired output value is approximately 5*Tau. For example, in a 100 KHz bandwidth system, this time period will be approximately 50 μs. For a high load to low load transient, by similar analysis, the output rises by approximately 20% of output value, and takes 5 to 7 Taus to settle.
In light of the foregoing discussion, there is a need to provide an efficient and fast transient response mechanism in switching devices.